Programming Research Group Technical Report TR-16-95

Conservative discrete-event simulations on Bulk Synchronous Parallel architectures

Radu Calinescu

April 1995, 33pp.

All the parallel discrete-event simulation algorithms developed so far have been designed to suit a specific parallel model (e.g., a PRAM model, a MP-RAM model, etc.). This paper presents several versions of conservative parallel discrete-event simulation algorithms developed around a unifying model for general purpose parallel computer design and programming, namely around the Bulk Synchronous Parallel (BSP) model. The new algorithms are analysed in terms of the BSP model parameters and the effectiveness of simulators based on these algorithms is evaluated. The performance achieved even for a loosely coupled distributed system is comparable with that reported in previous research work, while the generality of the BSP model provides portability to the new approaches.

Keywords:
Bulk Synchronous Parallel Computers, Conservative Parallel Simulation Algorithms, Discrete-Event Dynamical Systems, General Purpose Parallel Computing

Acknowledgements:
This work was supported by a Soros/Foreign Commonwealth Office scholarship.


This paper is available as a 113,017 byte compressed PostScript file.